Verilog Jobs
25 Jobangebote auf 6 unterschiedlichen Anzeigenmärkten gefunden.-
Senior Staff Engineer Functional Verification (f/m/div)
10.05.2024 Steiermark, Graz Stadt, 8010, GrazInfineon Technologies Austria AG VollzeitLet s verify greatness together. Chip in and apply now! Quick info Location Graz Entry level 5+ years Job ID HRC0755515 Start as soon as possible Type Full time Contract Permanent Job description As you embark on this electrifying opportunity, you ll lead the verification of digital IP, employ System Verilog / UVM methodologies, collaborate with design...
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Embedded Software Developer
31.03.2024 ÖsterreichAIT Austrian Institute of Technology GmbH Vollzeitvery good command of written and spoken English, good German in speaking and writing is an advantage Erfahrung Experience in the design or implementation of complex algorithms (e.g., in computer vision or image processing) on embedded systems Experience in FPGA or chip design using hardware description languages (e.g. VHDL / Verilog)
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Senior Staff Engineer Functional Verification
23.04.2024 Steiermark, Graz Stadt, 8010, GrazInfineon Technologies AG Vollzeittogether. Chip in and apply now!Quick InfoLocationGrazEntry Level5+ yearsJob IDHRC0755515Start01. Mai 2024TypeFull timeContractPermanentJob descriptionAs you embark on this electrifying opportunity, you ll lead the verification of digital IP, employ System Verilog / UVM methodologies, collaborate with design teams, and provide leadership for a small,...
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Principal Engineer Mixed Signal Verification (f/m/div)
14.04.2024 Kärnten, Villach Stadt, 9500, VillachInfineon Technologies Austria AG Vollzeit(System)Verilog Good communication skills and a team-oriented and proactive working style Fluent English skills with German skills as a plus We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the...
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Senior Verification Enigneer
28.04.2024 Vorarlberg, Dornbirn, 6850197.018 € / Jahr ic resourcesYou will have the opportunity to work on complex and challenging projects working closely with the other teams in Europe. Key Skills:Experience in UVM. Having worked on a number of successful and complex ASIC projects. Knowledge of a programming language (Verilog or SystemVerilog).An understanding of RTL design. Fluent in English. If you are interested in
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Industriepraktikum: Hardware-Software-Design
30.03.2024 Oberösterreich, Linz Stadt, 4020, LinzInfineon Technologies AG Studentenjob(in folgenden Themenfeldern möglich):Hardwarenahe SoftwareentwicklungAnaloges und digitales;Chipdesign (z.B. VHDL, Verilog, Cadence)SignalverarbeitungUnterstützung internationaler Teams bei Infineon in LinzIm Zuge des dualen Studiums mit Infineon Linz;wird man optimal auf;breite Tätigkeitsfelder vom Chip-Entwickler in
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Senior Staff Engineer Test Development Automation (f/m/div)
26.03.2024 Kärnten, Villach Stadt, 9500, VillachInfineon Technologies Vollzeitscripts)Knowledge of version control (Git) and development ticket system (Jira)Solid knowledge in Unix/Linux and Windows environmentExperience in micro-electronics, chip verification/simulation (lab measurement/automation is a plus)Know how in HDL System Verilog/VHDL and Modell and Simulator knowledge is beneficialExcellent mindset for software quality...
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Electronic Lab Engineer (f/m/d)
12.05.2024 Vorarlberg, Dornbirn, 6890, Lustenau, Vorarlberg60.000 € / Jahrelectronic circuits Basic Programming for Lab automation (e.g., Python) Besides, it is beneficial to have experience in: Programming (e.g., C, C++, VHDL, Verilog, SystemVerilog) Lab Automation via SCPI Simulation of digital and analog circuits PCB Design Very good communication skills to work in our diverse international team Good professional English...
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Mixed-Signal Verification Engineer - Austria
12.05.2024 Vorarlberg60.000 € / JahrInnovate the methodology to reduce the verification cost preserving the quality REQUIRED EXPERIENCE: - Bachelor or Master degree or equivalent in electrical engineering or physics - Several years of professional experience in analog/Mixed Signal Design or Verification - Knowledge of SystemVerilog, Verilog-AMS, VHDL/Verilog, or similar ...
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Principal Engineer Digital Design and Concept Engineering (f/m/div)
12.04.2024 Kärnten, Villach Stadt, 9500, VillachInfineon Technologies Austria AG VollzeitA university degree in Electrical Engineering, Informatics or related technical areas At least 8 years of professional experience in digital design, simulation and verification Tool knowledge of RTL, simulation, design-synthesis and design-optimization with Mathworks, Cadence and Synopsys Strong understanding of digital design principles, and experience with RTL coding in Verilog/System Verilog
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Cellular SoC Frontend-STA Engineer
19.01.2024 Oberösterreich, Linz Stadt, 4020, Linz60.214 € / Jahr AppleVery good understanding of Verilog and the ability to analyze RTL/Netlist designs Experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs, and power optimizations would be a huge plus Experience with synthesis, logic equivalence, or ECO techniques would be a plus Good communication skills and the...
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Senior Verification Engineer
21.12.2023 Vorarlberg, Dornbirn, 6850IC Resources VollzeitYou will have the opportunity to work on complex and challenging projects working closely with the other teams in Europe. Key Skills: Experience in UVM. Having worked on a number of successful and complex ASIC projects. Knowledge of a programming language (Verilog or SystemVerilog). An understanding of RTL design. Fluent in English. If you are...
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Senior Digital Design Engineer - Austria
02.12.2023 ÖsterreichmicroTECH Global LtdField of activity-Creation and verification of digital designs-Support of our international design team-Creation of high quality chip designsRequirements profile-Good Knowledge of VHDL and / or System Verilog-Experience in programming FPGA‘s-Knowledge of digital design verification with UVM is of advantage-Understanding of digital signal processing is...
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Analog ASIC Designer
05.10.2023 Steiermark, Graz Stadt, 8010, Graz45.000 € / Jahr IC Resources Vollzeitin Electrical Engineering plus 5+ years experience in CMOS analog design (dimensioning of transistors, matching calculations, noise calculations, circuit topologies) Experience with designing with BCD processes and HV structures up to 70V Experience in modelling of analog circuits (System Verilog, VHDL, System-C, Matlab- Simulink)
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Digital-Mixed-Signal Verification Engineer (m/f/d)
18.05.2023 Oberösterreich, Linz Stadt, 4020, Linz60.214 € / Jahr Applelevels from very detailed components to system-level Ideally, 3+ years of experience in hardware description languages like System Verilog, VHDL, and Verilog is desired Outstanding sense and drive for the quality of work you re doing Verification mindset and approach Reliable, ability to work independently as well as in a team...
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